VHDL Developer Plus(tm)

The VHDL Developer Plus(tm) is used by electronics engineers to easily generate behavioral and structural hardware descriptions for simulation or synthesis. The following three tools are provided:

• Model Creator generates all necessary VHDL source code from state machine and function table descriptions. Designers have control over the VHDL code style and the datatypes used.
• Language Assistant offers support for VHDL model generation including interactive syntax checking, code templates, and auto-formatting.
• Source Code Library Manager refines "design notes" into VHDL text and automatically completes subprogram calls and component instantiations. Libraries of VHDL source code are included.

Edith Ludwig

Vista Technologies, Inc.
1100 Woodfield Road
Suite 437
Schaumburg, IL 60173-5124
USA
708-706-9300
fax:708-706-9317